%0 Journal Article
%T Design and Implementation of a Semi-Unified High Performance Signal Processing Coprocessor
%J American Journal of Signal Processing
%@ 2165-9362
%D 2012
%I 
%R 10.5923/j.ajsp.20120201.01
%X Utilizing the DFT, the DHT, the DCT or the DST is an obvious choice in signal processing domain. This paper describes the implementation of a semi-unified high performance coprocessor of transform length '8' for the synchronous design in XC3S1400AN-4FG484 FPGA device of Xilinx Company. The operating frequency of 20 MHz is achieved. The paper presents the trade-offs involved in designing the architecture, the design for performance issues and the possibilities for future development.
%K Coprocessor
%K Discrete Transforms
%K Implementation
%U http://article.sapub.org/10.5923.j.ajsp.20120201.01.html