%0 Journal Article
%T Design and Application of Instruction Set Simulator on Multi-Core Verification
%A Xiang-Dong Hu
%A Yong Guo
%A Ying Zhu
%A Xin Guo
%A Peng Wang
%A <br>胡向东
%A 郭勇
%A 朱英
%A 郭昕
%A 王鹏
%J 计算机科学技术学报
%D 2010
%I 
%X Instruction Set Simulator(ISS) is a highly ed and executable model of micro architecture.It is widely used in the fields of verification and debugging during the development of microprocessors.However,with the emergence of Chip Multi-Processors,the single-core ISS cannot meet the needs of microprocessor development.In this paper,we introduce our multi-core chip architecture first,after that a general methodology to expand a single-core ISS to a multicore ISS(MCISS) is proposed.On this basis,a real-time comp...
%K 产电
%K 火山
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=F57FEF5FAEE544283F43708D560ABF1B&aid=BFAF010D1D1195C8A7B9458BF7518F7C&yid=140ECF96957D60B2&vid=C5154311167311FE&iid=0B39A22176CE99FB&sid=866F8A6B640835A7&eid=9F8C5EF901EA1E7E&journal_id=1000-9000&journal_name=计算机科学技术学报&referenced_num=0&reference_num=14