%0 Journal Article
%T Study of Minimization of Power Dissipation Techniques used in SRAM Cell
%A Swati Anand Dwivedi
%J International Journal of Electronics Communication and Computer Engineering
%D 2012
%I IJECCE
%X Power dissipation is the main problem associated with portable devices [1]. Designers are always tried to design the circuit in such way that they can reduce the power as small as possible. Power dissipation, speed and chip area are the three parameters by which we can describe the flexibility of the circuit. Switching speed and power dissipation is the key feature of any memory circuit. If we want to increase the switching speed of the memory circuit than obviously we have to compromise with chip area. In this paper we will focused on some method by which the power dissipation can be reduced. Section 1 covers the background detail section 2 describes the various source of power dissipation and its remedy section 3 describe the methods used for power reduction and we will mainly focused on third approach and finally section 4 concludes the paper.
%K Power dissipation
%K SRAM
%K Threshold voltage
%K VLSI
%U http://www.ijecce.org/administrator/components/com_jresearch/files/publications/ijecce-297.pdf