%0 Journal Article
%T Junctionless CMOS Transistors with Independent DoubleGates
%A A. Kamath
%A Z. X. Chen
%A N. Shen
%A X. Li
%J International Journal of Information and Electronics Engineering
%D 2013
%I IACSIT Press
%R 10.7763/ijiee.2013.v3.254
%X Scaling is getting challenging with everytechnology node. Implant process requirements for definingconformal junctions in 3D device are very stringent. In addition,defining gate over topography is limited by lithography. Oursolution to these problems is a novel junction-less FiNFET liketransistor. Unlike conventional FiNFET the gate definition inthis device is lithography independent. The fabricated NMOSand PMOS shows good transistor characteristics: ION =52.3uA/um, ION/IOFF ratio = 107, SS = 92mV/dec for NMOS andION =15.4 uA/um, ION/IOFF ratio = 105, SS = 90mV/dec forPMOS. We also show inverter VTC characteristics fabricatedusing this NMOS and PMOS.
%K CMOS
%K junctionless
%K independent gates
%U http://www.ijiee.org/papers/254-L0023.pdf