%0 Journal Article
%T Design of High-Speed Parallel Data Interface Based on ARM & FPGA
%A Daode Zhang
%A Yurong Pan
%A Xinyu Hu
%J Journal of Computers
%D 2012
%I Academy Publisher
%R 10.4304/jcp.7.3.804-809
%X This article described a complete design of parallel interface based on ARM & FPGA, using the on-chip DPRAM in FPGA to improve the metastability problem which was generated during data transmission between the asynchronous clock-domains; And it achieved the design of ARM & FPGA hardware interface module , data-sending module , data-receiving module and FPGA driver module , also gave the feasible method that using a flag to solve the dislocation of data-reading;
%K ARM
%K FPGA
%K Parallel Data Interface
%K metastability
%U http://ojs.academypublisher.com/index.php/jcp/article/view/6967