%0 Journal Article
%T PERFORMANCE EVALUATION OF AN EFFICIENT SINGLE EDGE TRIGGERED D FLIP FLOP BASED SHIFT REGISTERS USING CNTFET
%A Ravi.T
%A Kannan.V
%J Indian Journal of Computer Science and Engineering
%D 2013
%I Engg Journals Publications
%X Low power flip-flops are very important for low-power digital designs. Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices have shrunk down to nanometer ranges. Due to the usage ofmillions of components and shrinking process technology, power consumption is drastically high in nano MOSFETs. Hence the paradigm has shifted to Carbon Nano Tube FET. In this paper, impact of 32nMMOSFET and 32nM CNTFET in the design of single edge triggered D-Flip Flop based shift registers are measured in terms of average power, delay, power delay product, rise time and fall time. MOSFET and CNTFET designs are simulated in 1GHz clock frequency and their performances are compared.
%K CNTFET
%K Single Edge Triggered D Flip Flop
%K power
%K Power Delay Product
%K Rise Time
%K Fall Time.
%U http://www.ijcse.com/docs/INDJCSE13-04-04-020.pdf