%0 Journal Article
%T Hardware Implementation of the Huffman Encoder for Data Compression Using Altera DE2 Board
%A Dipalee Madhukar Kate
%J International Journal of Advances in Engineering Sciences
%D 2012
%I RG Education Society
%X This work will aim to describe hardware implementations of static and dynamic Huffman encoders written in VHDL.The flexibility of the design allows for hardware-based implementations using FPGAs. The proposed method will have the following properties: (1) high compression for test responses is expected because Huffman coding is well-known as a minimum block coding, (2) zero-aliasing compression can be achieved.(3) It would also reduce transmission time, storage space, translation table space and encoding times
%K VHDL
%K FPGA
%U http://rgjournals.com/index.php/ijse/article/view/277