%0 Journal Article
%T High Speed Continuous-Time Bandpass Ķē ADC for Mixed Signal VLSI Chips
%A P.A.HarshaVardhini
%A M.Madhavi Latha
%J International Journal of VLSI Design & Communication Systems
%D 2012
%I Academy & Industry Research Collaboration Center (AIRCC)
%X With the unremitting progress in VLSI technology, there is a commensurate increase in performance demand on analog to digital converter and are now being applied to wideband communication systems. sigma Delta (Ķē ) converter is a popular technique for obtaining high resolution with relatively small bandwidth. Ķē  ADCs which trade sampling speed for resolution can benefit from the speed advantages of nm-CMOS technologies. This paper compares various Band pass sigma Delta ADC architectures, both continuous-time and discrete-time, in respect of power consumption and SNDR. Design of 2nd order multibit continuous time band pass Ķē  modulator is discussed with the methods to resolve DAC non-idealities.
%K CMOS
%K Over sampling
%K Noise shaping
%K Sigma Delta Modulation
%K Bandpass Ķē  modulator
%K Dynamic element matching
%K Data weighted averaging.
%U http://airccse.org/journal/vlsi/papers/3212vlsics06.pdf