%0 Journal Article
%T CMOS Ultra-Wideband Low Noise Amplifier Design
%A K. Yousef
%A H. Jia
%A R. Pokharel
%A A. Allam
%A M. Ragab
%A H. Kanaya
%A K. Yoshida
%J International Journal of Microwave Science and Technology
%D 2013
%I Hindawi Publishing Corporation
%R 10.1155/2013/328406
%X This paper presents the design of ultra-wideband low noise amplifier (UWB LNA). The proposed UWB LNA whose bandwidth extends from 2.5£¿GHz to 16£¿GHz is designed using a symmetric 3D RF integrated inductor. This UWB LNA has a gain of 11 ¡À 1.0£¿dB and a NF less than 3.3£¿dB. Good input and output impedance matching and good isolation are achieved over the operating frequency band. The proposed UWB LNA is driven from a 1.8£¿V supply. The UWB LNA is designed and simulated in standard TSMC 0.18£¿¦Ìm CMOS technology process. 1. Introduction CMOS technology is one of the most prevailing technologies used for the implementation of radio frequency integrated circuits (RFICs) due to its reduced cost and its compatibility with silicon-based system on chip [1]. The use of ultra-wideband (UWB) frequency range (3.1¨C10.6£¿GHz) for commercial applications was approved in February 2002 by the Federal Communications Commission. Low cost, reduced power consumption, and transmission of data at high rates are the advantages of UWB technology. UWB technology has many applications such as wireless sensor and personal area networks, ground penetrating radars, and medical applications [2]. Low noise amplifier is considered the backbone of the UWB front-end RF receiver. It is responsible for signal reception and amplification over the UWB frequency range. LNA has many desired design specifications such as low and flat noise figure, high and flat power gain, good input and output wide impedance matching, high reverse isolation, and reduced DC power consumption [1, 3]. Nowadays one of the most suitable configurations suggested for LNA implementation is current reuse cascaded amplifier. This LNA configuration can attain low DC power consumption, high flattened gain, minimized NF, and excellent reverse isolation while achieving wide input and output impedance matching [1¨C3]. Radio frequency integrated inductors play a significant role in radio frequency integrated circuits (RFICs) implementation. Design, development, and performance improvement of RF integrated inductors represent a challenging work. Achieving high integration level and cost minimization of RFICs are obstructed because of the difficulties facing the RF integrated inductors designers which are related to obtaining high quality factors [4¨C6]. In this paper, the implementation of LNAs using 3D integrated inductors will be investigated. A symmetric 3D structure is proposed as a new structure of integrated inductors for RFICs. This paper discusses the design procedure of current reuse cascaded UWB LNA and its bandwidth
%U http://www.hindawi.com/journals/ijmst/2013/328406/