%0 Journal Article
%T Impacto de la memoria cache en la aceleraci¨®n de la ejecuci¨®n de algoritmo de detecci¨®n de rostros en sistemas empotrados
%A del Toro Hern¨¢ndez
%A Ernesto
%A Cabrera Sarmiento
%A Alejandro J.
%A S¨¢nchez Solano
%A Santiago
%A Cabrera Aldaya
%A Alejandro
%J Ingenier£¿-a Electr£¿3nica, Autom£¿£¿tica y Comunicaciones
%D 2012
%I Instituto Superior Polit¨¦cnico Jos¨¦ Antonio Echeverr¨ªa (Cujae)
%X the impact of cache memory over the speed up of viola-jones face detection algorithm on a fpga embedded processing system based in microblaze processor is analyzed in this paper. the viola-jones face detection algorithm is exposed and its software implementation is described, analyzing its main functions and data locality. the impact of size (among 2 and 16 kb) and line-length (between 4 and 8 words) of code and data cache memories are analyzed. using a spartan3a starter kit board, based on xc3s700a spartan3a fpga, with microblaze processor running at 62,5 mhz and 64mb of ddr2 external memory running at 125 mhz, code cache shows a higher impact than data cache, with optimal values of 8kb for code cache and among 4 to 16kb for data cache. a speed-up of 17 times over external memory execution of the algorithm is achieved with these cache memories sizes. cache line-length has little influence over the speed up of the algorithm.
%K algorithm speed up
%K cache memory
%K face detection
%K fpga
%K microblaze
%K viola-jones.
%U http://scielo.sld.cu/scielo.php?script=sci_abstract&pid=S1815-59282012000200008&lng=en&nrm=iso&tlng=en