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Applied Nanoscience 2013
Decreasing dimensions of planar field-effect transistors by using native inhomogeneity of heterostructureDOI: 10.1007/s13204-012-0171-z Keywords: Planar field-effect transistors,Decreasing dimensions of transistors,Transistors in heterostructure Abstract: In this paper we consider an approach to decrease dimensions of planar field-effect transistors in a semiconductor heterostructure. Some recommendations have been formulated to optimize technological processes in order to maximize the decreasing of the dimensions of the transistor.
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