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计算机科学技术学报 2010
Hierarchical Cache Directory for CMPKeywords: cache coherence protocol,hierarchical directory,chip multiprocessor Abstract: As more processing cores are integrated into one chip and feature size continues to shrink,the average access latency for remote nodes using directory-based coherence protocol becomes higher,which greatly impacts system performance. Previous techniques such as data replication and data migration optimize the performance of the requesting core,but offer little improvement for neighbor nodes.Other techniques such as in-transit optimization try to reduce latency at the cost of increased storage.This paper intr...
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