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OALib Journal期刊
ISSN: 2333-9721
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Delay Optimization for 32 Division PFD

Keywords: Power Factor , DelayFactor , MDR

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Abstract:

The frequency divider is an essential block in the high speed integrated circuit. Frequency Divider is the important block in the communication system. A Dual modulus prescaler divides the frequency of the Voltage controlled oscillator and prescaler circuit of 32 or 33. Main signals of Modulus control is the signalfor the Programmable divider. Dual modulus prescaler is prescaler is of two counters of the architecture in Counter operation of the power consumption is working parallel. the dual modulus prescaler is reduced in the modulus control signal generator. The frequency input is given to dual modulus prescaler for getting the output signal.

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