CQ Switch Analysis under Traffic Overload

An analysis of 2x2 crossbar packet switch with buffers at crosspoints and round robin scheduling algorithm is presented in this paper. The analysis is performed for a non-admissible traffic pattern, where output ports are overloaded. The case of full offered load is observed and output ports are loaded with packets that have different arrival probabilities. In addition to the parameters that are commonly observed in such an analysis (throughput and average packet delay), memory requirements for the implementation of the buffer, as well as fair representation when servicing the buffer - the so-called fairness are also analyzed. The results show that even for a switch with a small number of ports very large buffers should be implemented, if we want to achieve satisfactory performance under traffic overload.