Efficient modelling of IC conducted emission for power integrity analysis

In this paper two methodologies to reduce the complexity of IC conducted emission models for Power Integrity analysis in ICs are presented. The methodologies differ concerning the applicability in simulation tools, complexity and accuracy of the generated models. The first methodology uses a complex model and reduces its order to generate a model with a fewer number of elements. This methodology therefore involves a model order reduction approach. A second minimum complexity, module based modelling approach is introduced for rough estimations, as the order reduced model is still too complex for some applications. The two methodologies are applied to an IC conducted emission model of two digital modules of a 32 Bit microcontroller. The results of the three models are compared and discussed. Fields of application for the introduced modelling approaches are the estimation of the magnitude and time behaviour of the supply current as well as the determination of the number and position of the IC's supply pins.