Neurons cultured directly over open-gate field-effect transistors result in a hybrid device, the neuron-FET. Neuron-FET amplifier circuits reported in the literature employ the neuron-FET transducer as a current-mode device in conjunction with a transimpedance amplifier. In this configuration, the transducer does not provide any signal gain, and characterization of the transducer out of the amplification circuit is required. Furthermore, the circuit requires a complex biasing scheme that must be retuned to compensate for drift. Here we present an alternative strategy based on the design approach to optimize a single-stage common-source amplifier design. The design approach facilitates in circuit characterization of the neuron-FET and provides insight into approaches to improving the transistor process design for application as a neuron-FET transducer. Simulation data for a test case demonstrates optimization of the transistor design and significant increase in gain over a current mode implementation. 1. Introduction A transistor represents a unique type of transducer because it can both convert one type of energy to an electrical signal and amplify the resulting signal simultaneously. To amplify the signal, the correct amplification circuit topology must be chosen. A clever designer will optimize both the amplifier circuit and the transistor as part of an iterative design process. To our knowledge, a systematic methodology has not been presented to optimize the transistor structure and the amplification circuitry of neuron-FETs. The approach presented here relies on a circuit design strategy using the level of inversion methodology, also referred to as the approach [1–3]. This technique has recently gained widespread attention in the integrated circuit design community because it offers techniques for reducing power consumption and maximizing bandwidth in circuits designed to perform analog signal processing. The process of design may vary considerably as a function of the parameters under the designer's control. Printed circuit board-level engineering is done with discrete components. These system-level engineers select components from a range of available devices and then bias them appropriately. This is done by choosing the appropriate DC (static) operating points. Design with discrete components does not allow the designer control of intrinsic device parameters (i.e., width, length, oxide thickness, mobility, etc.). In contrast, integrated circuit engineers choose a process technology and then select dimensions (width and length) of individual
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