Design of an Analog CMOS based Interval Type-2 Fuzzy Logic Controller Chip

We propose the design of an analog Interval Type-2 (IT2) fuzzy logic controller chip that is basedon the realization approach of averaging of two Type-1 Fuzzy Logic Systems (T1 FLSs). Thefuzzifier is realized using transconductance mode membership function generator circuits. Themembership functions are made tunable by setting some reference voltages on the IC pins. Theinference is realized using current mode MIN circuits. The consequents are also tunable byproviding five reference current sources on chip. Defuzzification of both the T1 FLSs is based onweighted average method realized through scalar and multiplier-divider circuits. An analogcurrent-mode averager circuit is used for obtaining the defuzzified output of the IT2 fuzzy logiccontroller chip. The chip is designed for two inputs, one output and nine tunable fuzzy rules and isrealized in 0.18 μm technology. Cadence Virtuoso Schematic/Layout Editor has been used for thechip design and the performances of all the circuits are confirmed through the simulations carriedout using Cadence Spectre tool. The proposed architecture has an operation speed of 20MFLIPS and a power consumption of 20mW. The whole chip occupies an area of 0.32 mm2. Ascompared to the previous designs, the proposed design has achieved a considerable high speedalong with a significant reduction in power and area.