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Large Sending Offload: Design and Implementation for High-Speed Communications Rate up to 100 Gbps

Keywords: Large Sending Offload (LSO) , RISC core , TCP/IP , VHDL simulator , Cycle-accurate performance evaluations

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Abstract:

With the release of P802.3ba IEEE, send and receive data at 40 Gbps to 100 Gbps could become possible. Offloading part of the processing protocol to the network card showed success in sending data at high speeds up to 10 Gbps. Eventually, by enhancing transmission processing and taking advantage of the high speed, a potential network interface structure and performance needs to be addressed and implemented in order to send packets quickly corresponding with 40 Gbps and 100 Gbps. In this paper, such a network interface that supports high speeds after 10 Gbps has been designed. An alternative Large Sending Offload algorithm for sending TCP/IP and UDP/IP packets has also been implemented. A cost-effective RISC processor and a simple DMA for data transfer have also been implemented and simulated and tested for high speed. The behavior model shows that, a 450 MHz RISC core can support the sending-side processing up to 100 Gbps transmission speed for the TCP/IP and UDP/IP protocol when the MTU is 512 bytes or larger. A DMA with 2115 MHz is required to eliminate the idle cycles while transferring data over the 64-bit local bus.

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