Low Power MAC Unit for DSP Processor

Power dissipation is one of the most important design objectives in integrated circuit, after speed. Digital signal processing (DSP) circuits whose main building block is a Multiplier-Accumulator (MAC) unit. High speed and low power MAC unit is desirable for any DSP processor. This is because speed and throughput rate are always the concerns of DSP system. This paper explores the design of low power MAC unit with block enable technique to reduce power dissipation. The MAC unit is implemented using 130-nm CMOS process technology. The whole MAC chip is operated at 200 MHz with1.5V supply voltage. The result analysis shows that the power consumption is reduced by using block enable technique.