Dual Field Dual Core Secure Cryptoprocessor on FPGA Platform

This paper is devoted to the design of dual core crypto processor for executing both Prime field and binaryfield instructions. The proposed design is specifically optimized for Field programmable gate array(FPGA) platform. Combination of two different field(prime field GF(p) and Binary field GF(2m))instructions execution is analysed.The design is implemented in Spartan 3E and virtex5. Both theperformance results are compared. The implementation result shows the execution of parallelism usingdual field instructions