全部 标题 作者
关键词 摘要

OALib Journal期刊
ISSN: 2333-9721
费用:99美元

查看量下载量

相关文章

更多...

Area Efficient Implementation of MTI Processing Module on a Reconfigurable Platform

DOI: 10.1155/2014/167184

Full-Text   Cite this paper   Add to My Lib

Abstract:

This paper presents an area efficient Field Programmable Gate Array (FPGA) based digital design of a processing module for MTI radar. Signal contaminated with noise and clutter is modelled to test the efficacy of the design algorithms. For flexibility of design and to achieve optimized results, we have combined the high-level utility of MATLAB with the flexibility and optimization on FPGA for this implementation. Two- and three-pulse cancellers are chosen for design due to its simplicity in both concept and implementation. The results obtained are efficient in terms of enhanced throughput per Slice (TPA) of 1.146, that is, occupying fewer area resources on hardware while achieving optimized speed. The outcomes show that this design of MTI radar processor has many advantages, such as high processing precision, strong processing ability, real time, and low cost. All these advantages greatly contribute to the design requirements and make it appropriate for the application of high-speed signal processing. 1. Introduction In radar systems, it is often desirable to be able to differentiate between moving targets and those that are stationary. This information can greatly serve operators when the surveillance targets of interest, such as vehicles or aircraft, are located in environments with a high density of traffic, clutter, stationary, and slow moving targets. Fortunately, through the use of digital signal processing, it is possible to extract this information from the system in real time using a Moving Target Indicator (MTI) filter [1]. Modern radar systems have evolving requirements, both in how the systems are designed and how the end user uses the data. This results in design change in electronic systems affecting both the military and commercial design communities, that is, the need for smaller, energy-efficient systems with high processing-power requirements. This makes low power consumption key drivers in most designs of high speed systems. More digital logic also allows designers to make early decisions on actionable intelligence and to meta-tag sensor data earlier for more efficient analysis. These and other emerging techniques will allow for the creation of better radar systems, but each requires additional signal-processing resources. One of these resources is the emerging class of high-performance FPGAs. Moving Target Indicator (MTI) radars are developed and used extensively to detect and follow specific moving targets and eliminate clutters. Processing system in the radar is massive and complex, since it is required to perform at high

References

[1]  A. I. Zverev, “Digital MTI radar filters,” IEEE Transactlons on Audio and Electro Acoustics, vol. 16, no. 3, pp. 422–432, 1968.
[2]  FPGA signal processing for radar/sonar applications , Dec 1, 2007, By Ryan Kenny ? Penton Media Inc, 2009.
[3]  Z. Ali, A. Arshad, and U. Razzaq, “An FPGA based semi-parallel architecture for higher order Moving Target Indication (MTI) processing,” in Proceedings of the 21st International IEEE Workshop on Rapid System Prototyping (RSP '10), pp. 1–7, Fairfax, Va, USA, June 2010.
[4]  S. Xu, M. Li, and J. Suo, “Clutter processing for digital radars based on FPGA and DSP,” in Proceedings of the International Conference on Wireless Communications and Signal Processing (WCSP '09), pp. 1–4, Nanjing, China, November 2009.
[5]  D. S. Dawoud and S. Masupe, “Design and FPGA implementation of digit-serial fir filters,” in Proceedings of the IEEE 7th AFRICON Conference in Africa: Technology Innovation (AFRICON '04), pp. 203–209, Gaborone, Botswana, September 2004.
[6]  C. H. Dick and F. Harris, “Implementing narrow-band FIR filters using FPGAS,” in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS '96), pp. 289–292, May 1996.
[7]  R. Stapleton, K. Merranko, C. Parris, and J. Alter, “The Use of field programmable gate arrays in high performance radar signal processing applications,” in Proceedings of the IEEE International Radar Conference, pp. 850–855, May 2000.
[8]  S. Li and Y. Wang, “The design of radar signal processor based on FPGA,” in Future Wireless Networks and Information Systems, Y. Zhang, Ed., vol. 143 of LNS in Electrical Engineering, pp. 283–288, Springer, Berlin, Germany, 2012.
[9]  S. Sumeem, M. Mobien, and M. l. Siddiqi, “A pulse doppler radar using reconfigurable computing,” in Proceedings of the IEEE Proceedings of 7th International Multi Topic Conference (INMIC '03), pp. 213–217, 2003.
[10]  A. Arshad, F. Ahsan, Z. Ali, U. Razzaq, and S. Sajid, “An FPGA based architecture for Moving Target Indication (MTI) Processing using IIR Filters,” International Journal of Computer and Electrical Engineering, vol. 4, no. 5, pp. 679–683, 2012.
[11]  F. Bin Khalid, R. A. Amjad, and M. A. Chohan, “FPGA based real-time signal processor for pulse doppler radar,” in Proceedings of the IEEE/OSA/IAPR International Conference on Informatics, Electronics & Vision (ICIEV '12), pp. 362–366, Dhaka, Bangladesh, May 2012.
[12]  B. R. Mahafza and A. Z. Elsherbeni, Matlab Simulations for Radar Systems Design, Chapman & Hall/CRC CRC Press, LLC, 2004.
[13]  Lab Volt, Analog MTI Processing, Telecommunications Radar, Students Manual, 29279-00, Lab Volt, Farmingdale, NJ, USA, 1st edition, 1990.
[14]  D. Kandar, S. N. Sur, D. Bhaskar, A. Guchhait, R. Bera, and C. K. Sarkar, “Implementation of MTI based Pulse compression Radar system using DSRC communication channel,” International Journal of Information Technology and Knowledge Management, vol. 2, no. 2, pp. 379–382, 2010.
[15]  M. Yousuf, R. Mahmud, and A. Aziz, “Simulation design of an efficient MTI processing module for embedded platform,” in Proceedings of the IEEE 2nd Mediterranean Conference on Embedded Computing (MECO '13), pp. 75–78, Budva, Montenegro, June 2013.
[16]  R. Broich and H. Grobler, “Analysis of the computational requirements of a pulse-doppler radar signal processor,” in Proceedings of the IEEE Radar Conference, pp. 08357–084011, Atlanta, Ga, USA, May 2012.

Full-Text

comments powered by Disqus

Contact Us

service@oalib.com

QQ:3279437679

WhatsApp +8615387084133

WeChat 1538708413