A method to improve PUF reliability in FPGAs

Due to the impact of voltage, temperature and device aging, the traditional ring oscillator-based physical unclonable functions(RO-PUF)suffers from an unreliability issue, i.e., PUF output is subject to a constant change. To improve the reliability of the PUF, a stability test scheme related to the PUF mapping unit is proposed. The scheme uses ring oscillators with multiple complexity and various frequencies as sources of interference, which are placed near the PUF prototype circuit to interfere with it. By identifying and discarding unstable slices which lead to the instability of PUF, PUF reliability can be effectively improved. Experimental results show that surrounding logic circuits with multiple complexity and multiple frequencies can identify different unstable slices, and the higher the complexity, the more unstable slices are detected. Moreover, compared with newly published PUF literature, the PUF circuit possesses better statistical characteristic of randomness and lower resource consumption. With temperatures varying from 0 to 120 ℃ and voltage fluctuating between 0.85 and 1.2 V, its uniqueness and stability can achieve 49.78% and 98.00%, respectively, which makes it better for use in the field of security.