A weighted averaging method for signal probabilityof logic circuit combined with reconvergent fan-out structures

By analyzing the structures of circuits, a novel approach for signal probability estimation of very large-scale integration(VLSI)based on the improved weighted averaging algorithm(IWAA)is proposed. Considering the failure probability of the gate, first, the first reconvergent fan-ins corresponding to the reconvergent fan-outs were identified to locate the important signal correlation nodes based on the principle of homologous signal convergence. Secondly, the reconvergent fan-in nodes of the multiple reconverging structure in the circuit were identified by the sensitization path to determine the interference sources to the signal probability calculation. Then, the weighted signal probability was calculated by combining the weighted average approach to correct the signal probability. Finally, the reconvergent fan-out was quantified by the mixed-calculation strategy of signal probability to reduce the impact of multiple reconvergent fan-outs on the accuracy. Simulation results on ISCAS85 benchmarks circuits show that the proposed method has approximate linear time-space consumption with the increase in the number of the gate, and its accuracy is 4.2% higher than that of the IWAA.