具有硬件加速的SPI控制器IP核的设计与研究
Design and Research of SPI Controller IP Core with Hardware Acceleration

随着大规模集成电路的发展，基于IP复用的SoC (System-on-Chip)技术已成为芯片设计的主要趋势，IP核的复用也减轻了集成电路芯片的负担。SPI (Serial Peripheral Interface，串行外设接口)作为一个比较经典的IP核，其相关研究和运用受到国内外的广泛关注，因其通讯接口技术简单、传输速度快，被广泛集成在微处理器的通信电路接口模块中。在SoC系统中，为了进一步提高SPI通讯的速度和效能，设计加入DMA (Direct Memory Access)控制器就显得意义重大。因此，在这个设计中我们将把SPI与DMA组合在一起来使用，以实现提升数据交换的效率。本文首先介绍了相关的设计原理，给出基于AMBA总线协议和AXI总线协议设计的系统框图，描述验证环境，并通过Windows SP7021 IDE集成开发环境进行软件验证，来进行SPI接口IP核的设计和研究，通过时序仿真测试，SPI接口能正确地对数据进行传输，满足了SPI时序设计要求，并且能满足实际工程应用。
With the development of large-scale integrated circuits, SoC (System-on-Chip) technology based on IP reuse has become the main trend of chip design, and the reuse of IP cores has also reduced the burden of integrated circuit chips. As a classic IP core, SPI (serial peripheral interface) is widely concerned at home and abroad for its research and application. Because of its simple communication interface technology and fast transmission speed, it is widely integrated into the communication circuit interface module of microprocessor. In SoC system, in order to further improve the speed and efficiency of SPI communication, it is of great significance to design and add DMA (Direct Memory Access) controller. Therefore, in this design, we will combine SPI and DMA to improve the efficiency of data exchange. This paper first introduces the relevant design principles, gives the system block diagram based on the AMBA bus protocol and AXI bus protocol design, describes the verification environment, and carries out software verification through the Windows SP7021 IDE integrated development environment to carry out the design and research of the SPI interface IP core. Through the time sequence simulation test, the SPI interface can correctly transmit data, meet the requirements of SPI timing design, and meet the practical engineering applications.