Design and Application of Instruction Set Simulator on Multi-Core Verification

Instruction Set Simulator(ISS) is a highly ed and executable model of micro architecture.It is widely used in the fields of verification and debugging during the development of microprocessors.However,with the emergence of Chip Multi-Processors,the single-core ISS cannot meet the needs of microprocessor development.In this paper,we introduce our multi-core chip architecture first,after that a general methodology to expand a single-core ISS to a multicore ISS(MCISS) is proposed.On this basis,a real-time comp...