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应用于车载充电机的高效率交错并联PFC设计
High efficiency interleaved PFC design for vehicular charger

DOI: 10.7631/issn.1000-2243.17243

Keywords: 交错并联 功率因数校正 低谐波 损耗分析 效率
interleaved power factor correction(PFC) low harmonics loss analysis efficiency

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Abstract:

针对电动汽车充电机采用交错并联Boost功率因数校正电路拓扑作为前级,其高功率因数和低谐波电流特性能减少对电网的污染,给出电路详细设计过程及损耗分析. 通过数字化控制方式与硬件优化设计,减低损耗,使功率因数校正变换器在全功率范围的转换效率均较高,满足铂金版效率要求,达到节能环保目标. 实验证明,所设计的4kW样机同时兼具良好的功率因数效果和全功率、 高效率的优势,其设计方法是有效的.
Interleaved Boost PFC topology,which has high power factor and low harmonic current,is adopted as the front stage of the electric vehicle charger to reduce the pollution to the power grid. The designing process and power loss of this circuit have been analyzed in detail. The digital control and the optimized design of hardware reduce the power loss,which can make the high conversion efficiency of PFC converter in all power range. In addition,the requirement of platinum efficiency and the goal of energy saving can be achieved through this design. Experiments have proved that the designed 4kW prototype has the advantages of both high power factor and high efficiency in all power,which verify the validity of the design method

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